Tower Semiconductor Ltd. partners with NewPhotonics to launch laser‑integrated photonic integrated circuits

Tower Semiconductor Ltd., a prominent foundry for high‑value analog semiconductor solutions, has announced a strategic partnership with NewPhotonics. The collaboration has already begun high‑volume shipments of laser‑integrated, serviceable optical engine photonic integrated circuits (PICs). These devices are positioned to meet the escalating demand for high‑bandwidth, energy‑efficient optical interconnects that underpin artificial‑intelligence (AI) infrastructure.

Product performance and market positioning

The initial PIC offerings support data rates ranging from 800 Gb/s to 1.6 Tb/s. They are available in both external pluggable and near‑packaged optics formats, ensuring compliance with prevailing industry standards (e.g., SFP28, QSFP-DD). Tower Semiconductor has outlined plans to scale the technology to 6.4 Tb/s in future production runs, targeting both scale‑out (large‑scale, low‑cost deployments) and scale‑up (high‑performance, low‑latency) data‑center architectures.

Technical foundation

The PICs are built on Tower’s PH18DA silicon photonics platform, which integrates indium phosphide (InP) components—including lasers, semiconductor optical amplifiers (SOAs), modulators, and photodetectors—on a single chip. This heterogeneous integration offers several operational advantages:

AdvantageExplanation
Reduced complexityEliminates the need for external laser modules, simplifying board‑level design
Improved yieldMonolithic integration mitigates alignment tolerances associated with hybrid bonding
Enhanced reliabilityFewer discrete interconnects lower the risk of mechanical failure
Shortened time‑to‑marketIntegrated design flow accelerates development cycles

NewPhotonics supplies the laser‑integrated PICs, while Tower Semiconductor provides the manufacturing capability, thereby leveraging each partner’s core competencies.

Industry context

According to IDC, the global optical interconnect market is projected to grow from US $5.3 bn in 2024 to US $12.7 bn by 2030 (CAGR ≈ 14%). AI workloads, particularly those involving large‑scale language models and high‑frequency trading, are driving the need for data‑center interconnects that deliver terabit‑per‑second bandwidths while maintaining energy efficiency.

“The ability to deliver 800 Gb/s to 1.6 Tb/s in a single chip is a significant step forward,” said Dr. Elena García, chief technology officer at NewPhotonics. “It aligns with the industry’s shift towards more compact, energy‑efficient optical modules that can be integrated into existing rack‑mount infrastructures.”

Demonstration and next steps

Both companies will demonstrate their joint solutions at the ECOC 2026 conference in Malaga, Spain. The event will provide a platform for showcasing performance benchmarks, integration methodologies, and potential deployment scenarios in AI data centers.

Tower Semiconductor’s broader strategy involves expanding its silicon photonics portfolio and strengthening collaborations with fabless firms to support high‑performance data‑center and AI applications. The company’s announcement also underscores its commitment to advanced process platforms—SiPho, SiGe, BiCMOS, and RF CMOS—alongside design enablement and process‑transfer services for integrated circuits.

Implications for IT decision‑makers

  1. Bandwidth scalability – The 6.4 Tb/s roadmap offers a clear trajectory for future capacity planning.
  2. Operational efficiencies – Monolithic integration reduces the number of discrete components, lowering maintenance overhead.
  3. Energy consumption – Laser‑integrated PICs typically achieve lower optical‑to‑electrical conversion losses, translating to reduced data‑center power budgets.
  4. Time‑to‑market – Faster integration cycles can accelerate rollout of AI services, a critical competitive edge.

IT professionals evaluating optical interconnect solutions should consider how the PH18DA platform’s mixed‑technology approach aligns with their existing silicon photonics stack, as well as the availability of design‑enablement resources to facilitate rapid prototyping.